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May 1997
NS DESIG R N EW 1 ED F O 5504B r at MEND ECOM 504B an d HCpport Cente OT R 5 N Su /tsc See HC Technical sil.com w.inter c t our ta or w w or c on ERSIL 88-INT 1-8
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HC-5504DLC
SLIC Subscriber Line Interface Circuit
Description
The Intersil SLIC incorporates many of the BORSHT functions on a single IC chip. This includes DC battery feed, a ring relay driver, supervisory and hybrid functions. This device is designed to maintain transmission performance in the presence of externally induced longitudinal currents. Using the unique Intersil dielectric isolation process, the SLIC can operate directly with a wide range of station battery voltages. The SLIC also provides selective denial of power. If the PBX system becomes overloaded during an emergency, the SLIC will provide system protection by denying power to selected subscriber loops. The Intersil SLIC is ideally suited for the design of new digital PBX systems by eliminating bulky hybrid transformers.
Features
* Pin for Pin Replacement for the HC-5504 * Capable of +5V or +12V (VB+) Operation * Monolithic Integrated Device * DI High Voltage Process * Compatible With Requirements Worldwide PBX Performance
* Controlled Supply of Battery Feed Current for Short Loops (41mA) * Internal Ring Relay Driver * Allows Interfacing With Negative Superimposed Ringing Systems * Low Power Consumption During Standby * Switch Hook Ground Key and Ring Trip Detection Functions * Selective Denial of Power to Subscriber Loops
Ordering Information
PART NUMBER HC1-5504DLC-5 HC1-5504DLC-9 HC3-5504DLC-5 HC3-5504DLC-9 HC4P5504DLC-5 HC4P5504DLC-9 HC9P5504DLC-5 HC9P5504DLC-9 TEMPERATURE RANGE 0 to +75 C -40o to +85oC 0 to
o o o o
PACKAGE 24 Lead Ceramic DIP 24 Lead Ceramic DIP 24 Lead Plastic DIP 24 Lead Plastic DIP 28 Lead PLCC 28 Lead PLCC 24 Lead SOIC 24 Lead SOIC
Applications
* Solid State Line Interface Circuit for Analog and Digital PBX Systems * Direct Inward Dial (DID) Trunks * Voice Messaging PBXs * Allows Multi-Phone Operation
+75oC +75oC
o
-40o to +85oC 0 to
o
-40o to +85oC 0 to +75 C -40o to +85oC
Pinouts
HC-5504DLC (PDIP, CDIP, SOIC) TOP VIEW
RFS TIP RING RFS 1 2 3 24 TX 23 AG 22 C4 21 RX 20 +IN 19 -IN 18 OUT 17 C2 16 RC RD 10 RF 10 15 PD 14 GKD 13 SHD 12 RF 13 14 BG 15 N/C 16 SHD 17 GKD 18 PD TF 11 19 RC
HC-5504DLC (PLCC) TOP VIEW
RING N/C TIP TX AG 27 C4 26
4
3
2
1
28
VB+ 4
C3 DG RS RD TF 5 6 7 8 9
VB+
C3 DG N/C RS
5 6 7 8 9
25 RX 24 +IN 23 -IN 22 N/C 21 OUT 20 C2
VB-
11
BG 12
VB-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 8-19
File Number
2443.3
Specifications HC-5504DLC
Absolute Maximum Ratings (Note 1)
Maximum Continuous Supply Voltages (V B-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -60 to +0.5 V (V B+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +15 V (V B+ - VB-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75V Relay Drive Voltage (VRD) . . . . . . . . . . . . . . . . . . . . . . .-0.5 to +15V Junction Temperature Ceramic . . . . . . . . . . . . . . . . . . . . . . +175oC Junction Temperature Plastic . . . . . . . . . . . . . . . . . . . . . . . . +150oC Lead Temperature (Soldering 10 Sec.) . . . . . . . . . . . . . . . . +300oC
Operating Conditions
Operating Temperature Range HC-5504DLC-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +75oC HC-5504DLC-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC Storage Temperature Range . . . . . . . . . . . . . . . . . . -65oC to 150oC Relay Driver Voltage (VRD ) . . . . . . . . . . . . . . . . . . . . . . . +5 to +12V Positive Supply Voltage (V B+). . . . . . . 4.75 to 5.25 or 10.8 to 13.2V Negative Supply Voltage (VB-) . . . . . . . . . . . . . . . . . . . . -42 to -58V High Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V Low Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 0.6V Loop Resistance (R L) . . . . . . . . . . . . . . . . . . . . . . . . . 200 to 1200
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications PARAMETER On Hook Power Dissipation Off Hook Power Dissipation Off Hook IB+ Off Hook IB+ Off Hook IBOff Hook Loop Current Off Hook Loop Current Off Hook Loop Current Fault Currents TIP to Ground RING to Ground TIP to RING TIP and RING to Ground Ring Relay Drive VOL Ring Relay Driver Off Leakage Ring Trip Detection Period On Hook Ringing Current Switch Hook Detection Threshold
Unless Otherwise Specified, V B- = -48V, VB+ = +12V and +5V, AG = BG = DG = 0V, Typical Parameters TA = +25oC. Min-Max Parameters are Over Operating Temperature Range. CONDITIONS ILONG* = 0, VB+ = +12V RL = 600, ILONG* = 0, VB+ = +12V RL = 600, ILONG* = 0, TA = -40oC RL = 600, ILONG* = 0, TA = RL = 600, ILONG* = 0 RL = 1200, ILONG* = 0 RL = 1200, VB- = -42V, ILONG* = 0 TA = +25oC RL = 200, ILONG* = 0 +25oC MIN 17.5 36 TYP 170 425 35 21 41 MAX 235 550 6.0 5.3 41 48 UNITS mW mW mA mA mA mA mA mA
IOL = 62mA VRD = +12V, RC = 1 = HIGH, TA = RL = 600 +25oC SHD = VOL SHD = VOH GKD = VOL GKD = VOH RL = 200 (Note 2) (Note 2) (Referenced to 600 + 2.16F), (Note 2) 1VRMS 200Hz - 3400Hz, (Note 2) IEEE Method 58 60 0oC TA +75oC 50 18 20 0 -
14 55 41 55 0.2 2 2 110 10
0.5 100 3 30 12 10 5 20
mA mA mA mA V A Ring Cycles mApk mA mA mA mA mA ms k
Ground Key Detection Threshold
Loop Current During Power Denial Dial Pulse Distortion Receive Input Impedance Transmit Output Impedance Two Wire Return Loss SRL LO ERL SRL HI Longitudinal Balance 2 Wire Off Hook 2 Wire On Hook 4 Wire Off Hook
15.5 24 31
-
dB dB dB
65 63 58
-
dB dB dB
8-20
Specifications HC-5504DLC
Electrical Specifications PARAMETER Low Frequency Longitudinal Balance Unless Otherwise Specified, V B- = -48V, VB+ = +12V and +5V, AG = BG = DG = 0V, Typical Parameters TA = +25oC. Min-Max Parameters are Over Operating Temperature Range. (Continued) CONDITIONS R.E.A. Method, (Note 2), RL = 600 0oC TA +75oC at 1kHz, 0dBm Input Level, Referenced 600 200 - 3400Hz Referenced to Absolute Loss at 1kHz and 0dBm Signal Level (Note 2) (Note 2) Absolute Delay 2 Wire - 4 Wire, 4 Wire - 2 Wire Trans Hybrid Loss Overload Level 2 Wire - 4 Wire, 4 Wire - 2 Wire Level Linearity 2 Wire - 4 Wire, 4 Wire - 2 Wire Balance Network Set Up for 600 Termination at 1kHz VB+ = +5V VB+ = +12V At 1kHz, (Note 2) Referenced to 0dBm Level +3 to -40dBm -40 to -50dBm -50 to -55dBm Power Supply Rejection Ratio VB+ to 2 Wire VB+ to Transmit VB- to 2 Wire VB- to Transmit VB+ to 2 Wire VB+ to Transmit VB- to 2 Wire VB- to Transmit Logic Input Current (RS, RC, PD) Logic Inputs Logic `0' V IL Logic `1' V IH Logic Outputs Logic `0' V OL Logic `1' V OH * ILONG = Longitudinal Current NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. 2. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification compliance. ILOAD 800A, VB+ = +12V, +5V ILOAD 80A, VB+ = +12V ILOAD 40A, VB+ = +5V 2.7 2.7 0.1 5.0 0.5 5.5 5.0 V V V 2.0 0.8 5.5 V V 0V VIN + 5V 200 - 16kHz RL = 600 (Note 2) 30 - 60Hz, RL = 600 15 15 15 15 30 30 30 30 100 dB dB dB dB dB dB dB dB A 0.05 0.1 0.3 dB dB dB (Note 2) 36 1.5 1.75 40 2 ms dB Vpeak Vpeak 1 -89 5 -85 dBrnC dBm0p 0.05 0.02 0.2 0.05 dB dB MIN TYP MAX 23 -67 UNITS dBrnC dBm0p
Insertion Loss 2 Wire - 4 Wire, 4 Wire - 2 Wire Frequency Response Idle Channel Noise 2 Wire - 4 Wire, 4 Wire - 2 Wire
8-21
Specifications HC-5504DLC
Uncommitted Op Amp Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Bias Current Differential Input Resistance Output Voltage Swing (Note 2) RL = 10K, VB+ = +12V RL = 10K, VB+ = +5V Output Resistance Small Signal GBW AVCL = 1 (Note 2) (Note 2) CONDITIONS MIN TYP 5 10 20 1 5 3 10 1 MAX UNITS mV nA nA M V PEAK V PEAK MHz
Pin Descriptions
28 PIN PLCC 2 24 PIN DIP/SOIC 1 SYMBOL TIP DESCRIPTION An analog input connected to the TIP (more positive) side of the subscriber loop through a 150 feed resistor and a ring relay contact. Functions with the Ring terminal to receive voice signals from the telephone and for loop monitoring purposes. An analog input connected to the RING (more negative) side of the subscriber loop through a 150 feed resistor and a ring relay contact. Functions with the Tip terminal to receive voice signals from the telephone and for loop monitoring purposes. Senses ring side of loop for ground key and ring trip detection. During ringing, the ring signal is inserted into the line at this node and RF is isolated from RFS via a relay. Positive Voltage Source - Most positive supply. VB+ is typically 12V or 5V. Capacitor #3 - An external capacitor to be connected between this terminal and analog ground. Required for proper operation of the loop current limiting function, and for filtering V B-. Typical value is 0.3F, 30V. Digital Ground - To be connected to zero potential and serves as a reference for all digital inputs and outputs on the SLIC microcircuit. Ring Synchronization Input - A TTL - compatible clock input. The clock should be arranged such that a positive pulse transition occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected systems, on the positive going zero crossing. This ensures that the ring relay activates and deactivates when the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to +5V. Relay Driver - A low active open collector logic output. When enabled, the external ring relay is energized. Tip Feed - A low impedance analog output connected to the TIP terminal through a 150 feed resistor. Functions with the RF terminal to provide loop current, feed voice signals to the telephone set, and sink longitudinal current. Ring Feed - A low impedance analog output connected to the RING terminal through a 150 feed resistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone set, and sink longitudinal current. Negative Voltage Source - Most negative supply. VB- is typically -48V with an operational range of -42V to -58V. Frequently referred to as "battery". Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this ground terminal. Switch Hook Detection - A low active LS TTL - compatible logic output. Ground Key Detection - A low active LS TTL - compatible logic output. This output is enabled if the DC current into the ring lead exceeds the DC current out of the tip lead by more than 20mA, and disabled if this current difference is below an internally set threshold. Power Denial - A low active TTL - Compatible logic input. When enabled, the switch hook detect (SHD) and ground key detect (GKD) are not necessarily valid, and the relay driver (RD) output is disabled.
3
2
RING
4 5 6
3 4 5
RFS VB + C3
7 9
6 7
DG RS
10 11
8 9
RD TF
12
10
RF
13 14 16 17
11 12 13 14
VB BG SHD GKD
18
15
PD
8-22
Specifications HC-5504DLC Pin Descriptions (Continued)
28 PIN PLCC 19 24 PIN DIP/SOIC 16 SYMBOL RC DESCRIPTION Ring Command - A low active TTL - Compatible logic input. When enabled, the relay driver (RD) output goes low on the next high level of the ring sync (RS) input, as long as the SLIC is not in the power denial state (PD = 0) or the subscriber is not already off- hook (SHD = 0). Capacitor #2 - An external capacitor to be connected between this terminal and digital ground. Prevents false ground key indications from occurring during ring trip detection. Typical value is 0.15F, 10V. This capacitor is not used if ground key function is not required and (Pin 17) may be left open or connected to digital ground. The analog output of the spare operational amplifier. The output voltage swing is typically 5V. The inverting analog input of the spare operational amplifier. The non-inverting analog input of the spare operational amplifier. Receive Input, Four Wire Side - A high impedance analog input which is internally biased. Capacitive coupling to this input is required. AC signals appearing at this input differentially drive the Tip feed and Ring feed terminals, which in turn drive tip and ring through 300 of feed resistance on each side of the line. Capacitor #4 - An external capacitor to be connected between this terminal and analog ground. This capacitor prevents false ground key indication and false ring trip detection from occurring when longitudinal currents are induced onto the subscriber loop from near by power lines and other noise sources. This capacitor is also required for the proper operation of ring trip detection. Typical value is 0.5F, to 1.0F, 20V. This capacitor should be nonpolarized. Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX) and receive input (RX) terminals. Transmit Output, Four Wire Side - A low impedance analog output which represents the differential voltage across Tip and Ring. Transhybrid balancing must be performed (using the SLIC microcircuit's spare op amp) beyond this output to completely implement two to four wire conversion. This output is unbalanced and referenced to analog ground. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is essential. No Internal Connection.
20
17
C2
21 23 24 25
18 19 20 21
OUT -IN +IN RX
26
22
C4
27 28
23 24
AG TX
1,8,15,22
NC
NOTE: All grounds (AG, BG, & DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first.
Functional Diagram
RING SYNC RING COMMAND RS RC RD 1/2 RING RELAY TIP 150 150 2 WIRE LOOP SECONDARY PROTECTION V BVBRFS 1/2 RING RELAY RING 150 RING VOLTAGE VBRING PD SLIC MICROCIRCUIT -1 150 RX RECEIVE INPUT RF LOOP CURRENT LIMITER LINE DRIVERS TF BG BATTERY FEED +1 +IN + OP AMP OUT DIFF AMP + TX TRANSMIT OUTPUT RING CONTROL RING TRIP LOOP MONITORING SHD SWITCH HOOK DETECTION GKD GROUND KEY DETECTION TIP
-IN
POWER DENIAL
8-23
HC-5504DLC Schematic
SLIC FUNCTIONAL SCHEMATIC (DIP/SOIC PIN NUMBERS SHOWN)
21 RX
22 C4
11 VBAT
12 BAT GND
23 ANA GND VB +
6 DIG GND
4 VB+
20
19
18 OUT VB+
+
-
VOLTAGE & CURRENT BIAS NETWORK
VB1 VB2 VB3 VB4 VB5 +5V
A-500 OP AMP
VBAT IB3
VB+ TF 9 V
BAT
+ A-400 TIP FEED AMP IB4
R17 VB2 IB1 IB2 IB3 IB4 IB5 IB6 IB7 IB8 VBATIB9 IB10 IB11
RING TRIP DETECTOR R12 +5V VB+ GK A-200 LONG'L I/V AMP + R5 + VB+ SWITCH HOOK DETECTOR VB+ VBAT IB6 R6 + IB6 VBAT/2 REFERENCE VB2 R21 R14 R 18 QD27 QD28 THERMAL LIMITING RFC VB5 + VB5 PD 15 RC 16 VB1 SH SHD 13 + VB3 A-100 TRANSV'L I/V AMP VBAT STTL AND LOGIC INTERFACE C2 17 VBAT IB7 IB8 R20 + VBAT VB4 GND SHORTS CURRENT LIMITING IB1 GKD 14 +5V IB10 VB+
R7 TIP R8 1 RING FEED SENSE 3 R10 R9 VBAT R22 V + VBAT R23 B R11 VB+ QD3 QD36
R3 RING 2 R4 R1 R2 R16 R15
LOAD CURRENT LIMITING I
B2
RF 10 VBAT IB5 A-300 RING FEED AMP +
R 19 VBAT
R13 VBAT
VBAT
C3 5
TX 24
RS 7
RD 8
8-24
HC-5504DLC ontinued)
LOGIC GATE SCHEMATIC
C2
2
LOGIC BIAS DELAY 6 4 8 3
5 7 9 12
10
13 11 15 TTL TO STTL TTL TO STTL TTL TO STTL TO R21 14 RELAY DRIVER
C B A B A
STTL TO TTL
STTL TO TTL
RS
RC
PD
C SCHOTTKY LOGIC
RD
SHD
GKD
High voltage surge conditions are as specified in Table 1.
Die Characteristics
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 Diode Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 x 102 Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . Connected Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI Thermal Constants (oC/W) JA JC Ceramic DIP . . . . . . . . . . . . . . . . . . . . 52 15 Plastic DIP . . . . . . . . . . . . . . . . . . . . . . 52 22 PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . 67 29 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . 76 24
The SLIC will withstand longitudinal currents up to a maximum or 30mArms, 15mArms per leg, without any performance degradation.
.
TABLE 1 TEST CONDITION 10s Rise/ 1000s/Fall 10s Rise/ 1000 Fall PERFORMANCE (MAX) 1000 (Plastic) 500 (Ceramic) 1000 (Plastic) 500 (Ceramic) 1000 (Plastic) 500 (Ceramic)
PARAMETER Longitudinal Surge Metallic Surge
UNITS V PEAK V PEAK V PEAK V PEAK V PEAK V PEAK
Overvoltage Protection and Longitudinal Current Protection
The SLIC device, in conjunction with an external protection bridge, will withstand high voltage lightning surges and power line crosses.
T/GND R/GND 50/60Hz Current T/GND R/GND
10s Rise/ 1000s Fall
11 Cycles Limited to 10Arms
700 (Plastic) 350 (Ceramic)
V RMS V RMS
8-25
HC-5504DLC Applications Diagram
+5V TO +12V 15 RS1 CS1 K1
SYSTEM CONTROLLER 13 14 7 16 BALANCE NETWORK 21 24 20 19 R3 R2 18 17 5 22 + C4 C3 C2 + C6 R1 C7 ZB PCM SWITCHING FILTER/ NETWORK CODEC C5
TIP
K1A
RB1
1 SUBSCRIBER LOOP PRIMARY PROTECTION
POWER SWITCH GROUND RING RING SYNC CMD DENIAL HOOK KEY 8 DETECT DETECT RD RX 1 TIP TX RB2 9 SLIC +IN TIP FEED HC-5504DLC -IN OP AMP VB 10 RING FEED OUT C2 C3 RB4 2 RING NEG. BATT. 11 BATT. GND. 12 C8 -48V DIG. GND. 6 ANA. GND. 23 C9 VB + C4 VB + 4 RING FEED SENSE
K1B RS2 CS2
3
RING PTC
RB3
Z1
150V PEAK (MAX) RING GENERATOR -48V
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
Typical Component Values C2 = 0.15F, 10V C3 = 0.3F, 30V C4 = 0.5F to 1.0F, 10%, 20V (Should be nonpolarized) C5 = 0.5F, 20V C6 = C7 = 0.5F (10% Match Required) (Note 2) C8 = 0.01F, 100V C9 = 0.01F, 20V, 20% R1 = R2 = R3 = 100k (0.1% Match Required, 1% absolute value) ZB = 0 for 600 Terminations (Note 2) RB1 = RB2 = RB 3 = RB4 = 150 (0.1% Match Required, 1% absolute value) RS1 = RS2 =1k, typically. CS1 = CS2 = 0.1F, 200V typically, depending on VRING and line length. Z1 = 150V to 200V transient protection. PTC used as ring generator ballast.
NOTES: 1. Secondary protection diode bridge recommended is a 2A, 200V type. 2. To obtain the specified transhybrid loss it is necessary for the three legs of the balance network, C6-R1 and R2 and C7-ZB-R3, to match in impedance to within 0.3%. Thus, if C6 and C7 are 1F each, a 20% match is adequate. It should be noted that the transmit output to C6 sees a -22V step when the loop is closed. Too large a value for C6 may produce an excessively long transient at the op amp output to the PCM Filter/CODEC. A 0.5F and 100k gives a time constant of 50msec. The uncommitted op amp output is internally clamped to stay within 5.5V and also has current limiting protection. 3. All grounds (AG, BG, & DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. 4. To prevent saturation of longitudinal amplifier during ringing, the ringer current should be limited to less than 30mA peak. 5. Application shows Ring injected ringing, a Balanced or Tip injected configuration may be used. 6. Pin numbers given for DIP/SOIC package. Additional information is contained in Application Note 549, "The HC-550X Telephone SLICs'' By Geoff Phillips
8-26
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